Multiple-banked register file architectures
نویسندگان
چکیده
منابع مشابه
Banked Multiported Register File for Superscalar Microprocessors
Introduction: Multiported register files and bypass networks lie at the heart of a superscalar microprocessor core, providing buffered communication of register values between producer and consumer instructions. As issue widths increase, both the number of ports and the number of registers required increase, causing the area of a conventional multiported register file to grow more than quadrati...
متن کاملA Method for Register Allocation to Loops in Multiple Register File Architectures
Multiple instruction issue processors place high demands on register le bandwidth. One solution to reduce this bottleneck is the use of multiple register les. Register allocation for these architectures then becomes exceedingly important as spill code increases memory bandwidth demands and decreases performance, especially within loops. Previously, we have addressed the issue of nding an optima...
متن کاملPartitioned Register File Designs for Clustered Architectures
The clustered architecture, where the conventional monolithic register file is partitioned into several smaller register files, is one of the candidates for the future high performance processor architectures. The aggressive partitioning can reduce the access time of the register file. On the other hand, the partitioning makes losses of instructions per clock cycle due to communication among re...
متن کاملOn Reducing Register Pressure and Energy in Multiple-Banked Register Files
The storage for speculative values in superscalar processors is one of the main sources of complexity and power dissipation. In this paper, we present a novel technique to reduce register requirements as well as their dynamic and static power dissipation that is based on delaying the dispatch of instructions while minimizing its impact on performance. The proposed technique outperforms previous...
متن کاملPower-Aware Register Assignment for Multi-Banked Register Files
The multi-banked register file (MBRF) is an effective approach to reduce the complexity for a monolithic register file. In order to apply the multi-banked register file to a low-power microprocessor, we have to design a dynamic voltage scaling (DVS) approach for the MBRF to reduce its power consumption. However, when the temporary values are stored into an MBRF, their distributed storage locati...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: ACM SIGARCH Computer Architecture News
سال: 2000
ISSN: 0163-5964
DOI: 10.1145/342001.339708